Book Chapters:
- S.S. Kumar, A. Zjajo, R. van Leuken, “Exploration of the Thermal Design Space in 3D Integrated Circuits”, Physical Design for 3D Integrated Circuits, CRC Press, December 2015 (Invited)
Journals:
- S.S. Kumar, A. Zjajo, R. van Leuken, “Fighting Dark Silicon: Towards Realizing Efficient Thermal-Aware 3D Stacked Multiprocessors”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017
- S.S. Kumar, A. Zjajo, R. van Leuken, ” Immediate Neighbourhood Temperature Adaptive Routing for Dynamically-Throttled 3D Networks-on-Chip”, IEEE Transactions on Circuits and Systems – II (Express Briefs), November 2015
- S.S. Kumar, M.E. Tjin-A-Djie, R. van Leuken, “Pronto: A Low Overhead Message Passing System for High Performance Many-Core Processors”, International Journal on Networking and Computing (IJNC), vol.4, no.2, pp. 307-320, July 2014
- S.S. Kumar, A. Aggarwal, R. Jagtap, A. Zjajo, R. van Leuken, “System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.22, no.7, pp.1606-1619, July 2014
Conferences:
- A. Zjajo, S.S. Kumar, R. van Leuken, “Neuromorphic Spike Data Classifier for Reconfigurable Brain-Machine Interface”, 8th International IEEE EMBS Neural Engineering Conference, accepted, 2017.
- S.S. Kumar, A. Zjajo, R. van Leuken, “Ctherm: An Integrated Framework for Thermal-Functional Co-Simulation of Systems-on-Chip”, Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP), pp. 674,681, 2015.
- S.S. Kumar, A. Zjajo, R. van Leuken, “Physical Characterization of Steady-State Temperature Profiles in Three-Dimensional Integrated Circuits”, International Symposium on Circuits and Systems (ISCAS), pp. 1969,1972, 2015.
- J. de Klerk, S.S. Kumar, R. van Leuken, “CacheBalancer: Access Rate and Pain Based Resource Management for Chip Multiprocessors”, International Symposium on Computing and Networking (CANDAR), pp. 453,456, 2014
- S.S. Kumar, R. van Leuken, “Improving Data Cache Performance Using Persistence Selective Caching”, International Symposium on Circuits and Systems (ISCAS), pp.1945,1948, 2014
- S.S. Kumar, M.E. Tjin-A-Djie, R. van Leuken, “Low Overhead Message Passing for High Performance Many-Core Processors”, International Symposium on Computing and Networking (CANDAR), pp.345,351, 2013
- S.S. Kumar, A. Chahar, R. van Leuken, “Cit: A GCC Plugin for the Analysis and Characterization of Data Dependencies in Parallel Programs”, International Conference on the Design of Circuits and Integrated Systems (DCIS), 2013
- R. Jagtap, S.S. Kumar, R. van Leuken, “A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICs,” 5th Euromicro Conference on Digital System Design (DSD), pp.382,388, 2012
- A. Aggarwal, S.S. Kumar, A. Zjajo, R. van Leuken, “Temperature constrained power management scheme for 3D MPSoC,” 16th IEEE Workshop on Signal and Power Integrity (SPI), pp.7,10, 2012
- S.S. Kumar, R. van Leuken, “A 3D Network-on-Chip for stacked-die transactional chip multiprocessors using Through Silicon Vias,” 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), pp.1,6, 2011
- S.S. Kumar, G. Chandramohan, W. van Driel, G.Q. Zhang, “Effects of Crosstalk and Simultaneous Switching Noise on High Performance Digital System Packages”, 11th International Conference on Electronic Packaging Technology & High Density Packaging (ICEPT-HDP), pp.489,494, 2010
Posters:
- S.S. Kumar, A. Aggarwal, R. Jagtap, A. Zjajo, R. van Leuken, “Interconnect and Thermal Aware 3D Design Space Exploration”, Invited Presentation and Poster, ICT.OPEN, Eindhoven, The Netherlands, 2013
- S.S. Kumar, R. van Leuken, A. Michos, A. Chahar, J. de Klerk, “Naga High-Performance Array Processor”, Poster and Demonstrator, University Booth – Design Automation and Test in Europe (DATE), Grenoble, France, 2013
- S.S. Kumar, A. Michos, R. van Leuken, “Improving Validation Concurrency in Hardware Transactional Memory Architectures”, Poster, ICT.OPEN, Rotterdam, The Netherlands, 2012
- S.S. Kumar, R. van Leuken, “TMFab – A Transactional Memory Fabric for Chip Multiprocessors”, Poster, Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP) – Design Automation and Test in Europe (DATE), Grenoble, France, 2011
- S.S. Kumar, R. Jagtap, R. van Leuken, “Architecture and Organization of a Stacked-Die Transactional Many-core Processor”, Poster, ICT.OPEN, Veldhoven, The Netherlands, 2011