Hardwired SoC architectures suffer from a lack of flexibility regarding market evolution, resulting in an excessive design cycle time and increased cost. Furthermore, process variability is not yet well addressed for 32 nm and beyond. The objective of COBRA is to develop and experiment an open, flexible and high performance platform by substituting heterogeneous mixed HW/SW specialized sub-systems by a programmable processor array. This massively parallel computing fabric will also improve manufacturability and energy efficiency of new Systems On Chip, due to its design regularity, while at the same time maximizing flexibility by allowing software product derivatives to be generated. These will reduce development and manufacturing costs as well as Time-to-market when compared with hardwired alternatives. The COBRA project is funded by the European CATRENE programme and is a collaborative research effort between a number of industrial partners including STMicroelectronics and NXP, as well as academic partners like TU Delft and TU Eindhoven.
Within COBRA, the Circuits and Systems (CAS) group is tasked with the design of the many-core processor array. Specifically, CAS investigates architectural optimizations for high performance, techniques to monitor and improve dependability, and design methodologies to decrease time-to-market.